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Journal of Circuits, Systems and Computers, ISSN 0218-1266, 06/2018, Volume 28, Issue 3
This paper presents the design of linear ramp generator and digital BIST for an on-chip ADC testing. It replaces the costly and time-consuming traditional... 
ADC | ORA, TIQ comparator | Ramp | built-in self-test | nonlinearity | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
International Journal of Electronics, ISSN 0020-7217, 08/2019, Volume 106, Issue 8, pp. 1127 - 1140
This paper proposes a time domain modelled built-in self-test (BIST) with ramp noise projection and their effects on analogue to digital converter (ADC) in... 
Time domain | Built-In Self-Test | linearity | flash ADC | Ramp signal | TIQ comparator | ENGINEERING, ELECTRICAL & ELECTRONIC | Time domain analysis | Self tests | Harmonic distortion | Linearity | Analog to digital converters
Journal Article
Elektrik : Turkish journal of electrical engineering & computer sciences, ISSN 1300-0632, 2019, Volume 27, Issue 3, pp. 2226 - 2242
This paper proposes a solution for automatic service restoration along with automatic fault location and isolation of the faulty sections in feeder in a power... 
fault diagnosis | self-resilient power system | SERVICE RESTORATION | MANAGEMENT | distribution system restoration | Automatic service restoration | POWER ENGINEERING APPLICATIONS | EXPERT-SYSTEM | TECHNOLOGY | COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE | multiagent system | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Lecture Notes in Electrical Engineering, ISSN 1876-1100, 2017, Volume 403, pp. 15 - 28
Conference Proceeding
Lecture Notes in Electrical Engineering, ISSN 1876-1100, 2017, Volume 403, pp. 153 - 166
Conference Proceeding
Journal of Computational and Theoretical Nanoscience, ISSN 1546-1955, 07/2017, Volume 14, Issue 7, pp. 3463 - 3471
Rapid increase in the demand for electricity has fuelled a proportional increase in the length and number or lines. These lines are subject to faults due to... 
Fault diagnosis | Fault location | Power system reliability | Bayesian probabilistic matrix | Power system protection | Insulation | Power supplies | Computer simulation | Short circuits | Electricity consumption | Storm damage | Faults | Restoration | Fault detection | Electricity | Diagnostic software | Diagnostic systems | Bayesian analysis | Electric power distribution
Journal Article
Microelectronics Journal, ISSN 0026-2692, 11/2018, Volume 81, pp. 8 - 15
This paper presents an on-chip built-in self-test technique for testing an ADC. The conventional test of a mixed signal element has performed through DSP based... 
ADC | Ramp | Test pattern generation | On-chip circuit | BIST | TIQ comparator | ORA | CALIBRATION | NANOSCIENCE & NANOTECHNOLOGY | LINEARITY TEST | ENGINEERING, ELECTRICAL & ELECTRONIC | Digital signal processors | Analysis
Journal Article
INTERNATIONAL JOURNAL OF BIO-INSPIRED COMPUTATION, ISSN 1758-0366, 2020, Volume 15, Issue 1, pp. 43 - 51
Journal Article
International journal of bio-inspired computation, ISSN 1758-0366, 01/2020, Volume 15, Issue 1, pp. 43 - 51
This paper discusses the performance analysis of memetic and genetic algorithms (GA and MA) as the optimising strategy for the design of embedded evolvable... 
Microprocessors | Search algorithms | Circuits | Evolution | Experimentation | Evolvable hardware | Field programmable gate arrays | Genetic algorithms | Design optimization | Fitness | Reconfiguration
Journal Article
COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, ISSN 0332-1649, 01/2017, Volume 36, Issue 1, pp. 350 - 363
Journal Article
Sādhanā, ISSN 0256-2499, 10/2016, Volume 41, Issue 10, pp. 1189 - 1201
... VASANTHA RANI 2 1 Valliammai Engineering College, Anna University, Chennai 603 203, India 2 MIT Campus, Anna University, Chennai 600 044, India e-mail: mail2scprasanna... 
Engineering | BCSE algorithm | software-defined radio | Engineering, general | root-raised cosine filter | multistandard wireless communication | reconfigurable interpolation filter | ENGINEERING, MULTIDISCIPLINARY | FPGA | Electric filters | Software | Algorithms | Digital integrated circuits
Journal Article
2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP), 07/2019, pp. 1 - 7
In this work power factor improvement and harmonic minimization for the interleaved synchronous buck converter connected through the nonlinear load is... 
Interleaved buck converter (IBC) | voltage mode control | Total harmonic distortion(THD) | voltage controlled power factor correction (VCPFC) | Phase locked loop (PLL) | Unity power factor(UPF) | Electromagnetic interference(EMI)
Conference Proceeding
International Journal of High Performance Systems Architecture, ISSN 1751-6528, 2015, Volume 5, Issue 3, pp. 127 - 140
Journal Article
2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN), 03/2017, pp. 1 - 5
In recent years, the electronic systems become more complex due to high integration of multi-system functionalities with deep submicron technologies. Also, the... 
Built-In Self-Test (BIST) | Capacitors | Linearity | Built-in self-test | Ramp Generator | Generators | Analog and Mixed Signal (AMS) | Analog to Digital Converter (ADC) | Transistors | Signal resolution
Conference Proceeding
2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP), 07/2019, pp. 1 - 5
This paper analyses different hybrid logic blocks composed of Look-Up Tables (LUTs) and Universal Logic Gates (ULGs). The pure LUT based architecture incurs a... 
universal logic gate | configurable logic blocks | hybrid logic element | Field-programmable gate array | basic logic element
Conference Proceeding
2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN), 03/2017, pp. 1 - 6
A genetic algorithm (GA) is a powerful heuristic method of selection based on natural living process. Because of larger size of the scheduling, implementing GA... 
Adaptive Genetic Algorithm Processor | Finite impulse response filters | VLSI | Sociology | Genetic algorithm | Process control | Verilog | Filtering algorithms | Adaptive Noise Canceller | Statistics | Biological cells | Genetic algorithms
Conference Proceeding
Advances in Intelligent Systems and Computing, ISSN 2194-5357, 2017, Volume 517, pp. 295 - 304
Conference Proceeding
ARPN Journal of Engineering and Applied Sciences, 2015, Volume 10, Issue 11, pp. 4964 - 4970
Journal Article
2015 3rd International Conference on Signal Processing, Communication and Networking (ICSCN), 03/2015, pp. 1 - 6
In this paper, FPGA realization of MUX based multiplier and odd multiple scheme architectures are proposed for FIR filter and discussed in terms of complexity.... 
FIR filter | Reconfigurable Architecture | Signal processing | Table lookup | Distributed Arithmetic | Arrays | Look-up Table | Field programmable gate arrays | FIR filters | Multipliers | Conferences | Architecture | Tables (data) | Cyclones | Digital filters
Conference Proceeding
International Journal of Engineering and Technology, ISSN 2319-8613, 2014, Volume 6, Issue 2, pp. 735 - 744
Journal Article
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