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IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 01/2017, Volume 52, Issue 1, pp. 210 - 217
A 48 WL stacked 256-Gb V-NAND flash memory with a 3 b MLC technology is presented. Several vertical scale-down effects such as deteriorated WL loading and... 
Performance evaluation | flash memory | IO design | Calibration | Vnand V-NAND | 48 WL stack 3-D | Resistance | Loading | 3-D nonvolatile memory | NAND flash | Computer architecture | Capacitance | 3-D NAND | Timing | ZQ calibration | VNAND V-NAND | ENGINEERING, ELECTRICAL & ELECTRONIC | Nonuniform | Temperature compensation | Flash memory (computers)
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 01/2018, Volume 53, Issue 1, pp. 124 - 133
A 64-word-line-stacked 512-Gb 3-b/cell 3-D NAND flash memory is presented. After briefly examining the challenges that occur to a stack, several technologies... 
NAND flash memory | Annealing | self IO test | Programming | Built-in self-test | 64 word-line(WL) stack | Niobium | cache program | Loading | Logic gates | 3-D NAND | Reliability | 3-bit per cell | error correction | V-NAND | reliability | ENGINEERING, ELECTRICAL & ELECTRONIC | Performance enhancement | Flash memory (computers)
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 04/2012, Volume 47, Issue 4, pp. 981 - 989
A monolithic 64 Gb MLC NAND flash based on 21 nm process technology has been developed. The device consists of 4-plane arrays and provides page size of up to... 
NAND flash memory | Latches | pseudo differential sensing | Layout | Ash | Sensors | Timing | System-on-a-chip | Random sequences | Asynchronous double data rate (DDR) interface | ENGINEERING, ELECTRICAL & ELECTRONIC | Performance enhancement | Flash memory (computers) | Arrays | Devices | Circuits | Bandwidth
Journal Article
Journal Article
Conference Proceeding
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, ISSN 0193-6530, 02/2016, Volume 59, pp. 130 - 131
Conference Proceeding
2018 IEEE International Solid - State Circuits Conference - (ISSCC), ISSN 0193-6530, 02/2018, Volume 61, pp. 340 - 342
Since the first demonstration of a production quality three-dimensional (3D) stacked-word-line NAND Flash memory [1], the 3b/cell 3D NAND Flash memory has seen... 
Degradation | Three-dimensional displays | Bit error rate | Computer architecture | Programming | Sensors | Flash memories
Conference Proceeding
Cancer research (Chicago, Ill.), ISSN 0008-5472, 04/2012, Volume 72, Issue 8 Supplement, pp. 2635 - 2635
Journal Article
2010 IEEE International Solid-State Circuits Conference - (ISSCC), ISSN 0193-6530, 02/2010, Volume 53, pp. 442 - 443
We present a 159 mm 2 32 Gb MLC NAND Flash that is capable of 200 MB/S read and 12 MB/S write throughputs in 32 nm technology. This performance is achieved by... 
Degradation | Power supplies | Bridge circuits | Switches | Interference | Voltage | Throughput | Interleaved codes | Pulse modulation | Delay
Conference Proceeding
2017 IEEE International Solid-State Circuits Conference (ISSCC), 02/2017, pp. 202 - 203
The advent of emerging technologies such as cloud computing, big data, the internet of things and mobile computing is producing a tremendous amount of data. In... 
Three-dimensional displays | Annealing | Built-in self-test | Programming | Generators | Flash memories | Clocks
Conference Proceeding
2016 IEEE International Solid-State Circuits Conference (ISSCC), 01/2016, pp. 130 - 131
Today's explosive demand for data transfer is accelerating the development of non-volatile memory with even larger capacity and cheaper cost. Since the... 
Temperature sensors | Temperature measurement | Resistance | Microprocessors | Computer architecture | Reliability | Flash memories
Conference Proceeding
한국정보과학회 학술발표논문집, ISSN 2466-0825, 2003, Volume 30, Issue 1A, pp. 482 - 484
Journal Article
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