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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 10/2000, Volume 19, Issue 10, pp. 1189 - 1201
Journal Article
Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159), ISSN 1089-3539, 2000, pp. 217 - 224
The Variations in IDDQ due to process disturbances for sub-micron ICs is comparable to magnitude of defect induced currents. This is making traditional IDDQ... 
Performance evaluation | Power measurement | Power supplies | Current measurement | Instruments | Production | Predictive models | Current supplies | Random processes | Testing
Conference Proceeding
Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223), ISSN 1550-5774, 1998, Volume 1998-, pp. 335 - 340
In this paper we present a test generation approach for time and frequency domain testing of analog circuits. Tests are generated to detect faulty circuits... 
Performance evaluation | Fault detection | Analog circuits | Electrical fault detection | Search problems | Steady-state | Circuit faults | Circuit testing | Frequency domain analysis | Genetic algorithms
Conference Proceeding
Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231), ISSN 1093-0167, 1998, pp. 132 - 137
The use of alternate tests in addition to specification-based measurements is achieving more recognition in industry due to the higher coverage that they... 
Circuit optimization | Electric variables measurement | Analog circuits | CMOS process | Pulse circuits | Circuit synthesis | Circuit faults | Impulse testing | Circuit testing | Frequency domain analysis
Conference Proceeding
Proceedings Tenth International Conference on VLSI Design, ISSN 1063-9667, 1997, pp. 408 - 412
In this paper we propose a methodology for obtaining a closed form expression for the output of a linear analog circuits from its state-space description.... 
Circuit simulation | Computational modeling | RLC circuits | Voltage | Analog circuits | Analog computers | Polynomials | Circuit faults | Sparse matrices | Circuit testing
Conference Proceeding
Proceedings of the IEEE VLSI Test Symposium, 1998, pp. 132 - 137
Conference Proceeding
Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159), ISSN 1089-3539, 2000, pp. 349 - 357
Measuring analog threshold voltage between two different digital codes is a common test performed during production testing of ADCs. Due to the noisy nature of... 
Interpolation | Histograms | Instruments | Linearity | Production | Gain measurement | Performance gain | Signal processing | Servomechanisms | Testing
Conference Proceeding
Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013), ISSN 1063-9667, 1999, pp. 597 - 602
In this paper, we present a novel test generation strategy based on partial numerical fault simulation. Existing fault-based test generation methodologies for... 
Performance evaluation | Circuit simulation | Computational modeling | Fault detection | Analog circuits | Numerical simulation | Electrical fault detection | DC generators | Circuit faults | Circuit testing
Conference Proceeding
Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146), ISSN 1093-0167, 1999, pp. 214 - 219
Dynamic transient tests can give better parametric and catastrophic fault coverage than both static DC and frequency domain AC tests in minimum test time.... 
Performance evaluation | Circuit simulation | Computational modeling | Analog circuits | Numerical simulation | Search problems | Electrical fault detection | Circuit faults | Circuit testing | Frequency domain analysis
Conference Proceeding
Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125), ISSN 1093-0167, 1997, pp. 261 - 266
In this paper an efficient low-cost built-in self test (BIST) scheme is proposed for analog circuits. The key idea is to use rectangular pulses of random... 
Space vector pulse width modulation | Performance evaluation | Automatic testing | Linear feedback shift registers | Feedback circuits | Design methodology | Built-in self-test | Analog circuits | Pulse circuits | Circuit testing
Conference Proceeding
IEEE Design & Test of Computers, ISSN 0740-7475, 07/2000, Volume 17, Issue 3, pp. 106 - 115
For complex mixed-signal designs, BIST is becoming a necessity. The BIST scheme presented here maximizes coverage of parametric and catastrophic failures and... 
Fault diagnosis | Space vector pulse width modulation | Transient response | Production | Built-in self-test | Analog circuits | Sampling methods | Electrical fault detection | Circuit faults | Circuit testing | SIGNAL | SELF-TEST | ENGINEERING, ELECTRICAL & ELECTRONIC | Mathematical models | Catastrophic failure analysis | Sampling | Transient responses
Journal Article
Proceedings of the IEEE International Conference on VLSI Design, 1997, pp. 408 - 412
Conference Proceeding
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