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IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 12/2015, Volume 50, Issue 12, pp. 2901 - 2911
This paper presents a 13 bit 50 MS/s fully differential ring amplifier based SAR-assisted pipeline ADC, implemented in 65 nm CMOS. We introduce a new fully... 
ADC | energy efficient ADC | fully differential ring amplifier | Noise | Capacitors | Pipelines | Switches | SAR ADC | pipeline ADC | low power ADC | pipelined SAR ADC | Pipeline processing | SAR-assisted pipeline ADC | switched capacitor | Linearity | Gain | analog to digital converter | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 12/2014, Volume 49, Issue 12, pp. 2846 - 2856
This paper presents a time-interleaved (TI) SAR ADC which enables background timing skew calibration without a separate timing reference channel and enhances... 
ADC | Power demand | timing skew calibration | Capacitors | time-interleaved ADC | SAR ADC | timing skew | analog-to-digital converter | background timing skew calibration | Calibration | successive approximation register ADC | subrange SAR ADC | Ash | Delays | Clocks | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 12/2016, Volume 51, Issue 12, pp. 2941 - 2950
This paper presents an energy-efficient successive approximation register (SAR)-assisted digital-slope analog-todigital converter (ADC) architecture for... 
successive approximation register (SAR) | SAR-assisted digital-slope ADC | Capacitors | Analog-to-digital converter (ADC) | Switches | SAR ADC | CMOS process | Time-domain analysis | digital-slope ADC | hybrid ADC | Delays | Signal to noise ratio | Clocks | CMOS | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Journal Article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, ISSN 0018-9200, 12/2013, Volume 48, Issue 12, pp. 3019 - 3027
A 20-bit incremental ADC for battery-powered sensor applications is presented. It is based on an energy-efficient zoom ADC architecture, which employs a coarse... 
DELTA-SIGMA | SAR ADC | A/D conversion | LOW-POWER | zoom ADC | ENGINEERING, ELECTRICAL & ELECTRONIC | battery-powered sensors | inverter-based integrator | incremental ADC | low power circuits | delta-sigma ADC | and dynamic error correction techniques | RANGE
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 12/2017, Volume 52, Issue 12, pp. 3219 - 3234
An oversampled continuous-time (CT) pipeline ADC clocked at 9 GHz achieving 1.125-GHz bandwidth and -164 dBFS/Hz average small-signal noise density is... 
AC-DC power converters | Computed tomography | Analog-to-digital converter | Bandwidth | Signal processing | oversampling ADC | continuous-time (CT) ADC | pipeline ADC | residue cancellation | Delays | Pipeline processing | DELTA-SIGMA ADC | MHZ-BW | MASH ADC | ENGINEERING, ELECTRICAL & ELECTRONIC | CMOS | Artifacts | Aliasing | Pipelines | Digitization | Oversampling
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 03/2013, Volume 60, Issue 3, pp. 570 - 581
Journal Article
by Wong, SS and Chio, UF and Zhu, Y and Sin, SW and U, SP and Martins, RP
IEEE JOURNAL OF SOLID-STATE CIRCUITS, ISSN 0018-9200, 08/2013, Volume 48, Issue 8, pp. 1783 - 1794
This paper presents the architecture of a 10b 170MS/s two-step binary-search assisted time-interleaved SAR ADC. The front-end stage of this ADC is built with a... 
Analog-to-digital converter (ADC) | SAR ADC | two-step ADC | binary-search ADC | time-interleaved | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 2012, Volume 47, Issue 11, pp. 2783 - 2795
Journal Article
06/2009
The motivation behind this work is to target the demand for high-speed medium-resolution ADCs for satellite communication systems. An 8-bit, 12.5GS/s... 
8 bit SiGe ADC | high speed ADC | Folding interpolating ADC | C.A.T Salama | Shohreh Ghetmiri | IHP ADC | shoreh ghetmiri | An 8-bit, 12.5GS/s Folding-Interpolating Analog-to-Digital Converter
Dissertation
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 2014, Volume 49, Issue 7, pp. 1639 - 1652
Journal Article
Zeitschrift für anorganische und allgemeine Chemie, ISSN 0044-2313, 01/2018, Volume 644, Issue 1, pp. 58 - 64
A novel copper(II) coordination compound was synthesized using azodicarbonamide (ADC) as ligand (CuII‐ADC). The structural, morphological, and optical... 
Ammonium nitrate | Phase stabilization | Azodicarbonamide | Copper | CuII‐ADC / AN/CuII‐ADC | ADC | ADC / AN/Cu | EXPLOSIVES | THERMAL STABILIZATION | MECHANISM | BEHAVIOR | COMPLEXES | DECOMPOSITION | Cu-II-ADC / AN/Cu-II-ADC | CHEMISTRY, INORGANIC & NUCLEAR | TRANSITION | MIXTURES | AGENT | DETONATION VELOCITY | Copper compounds | Optical properties | Investigations
Journal Article
by Oh, DR and Kim, JI and Jo, DS and Kim, WC and Chang, DJ and Ryu, ST
IEEE JOURNAL OF SOLID-STATE CIRCUITS, ISSN 0018-9200, 01/2019, Volume 54, Issue 1, pp. 288 - 297
A 6-bit 2.5-GS/s 8x dynamic interpolating flash analog-to-digital converter (ADC) with an offset calibration technique for interpolated voltage-to-time... 
Analog-to-digital conversion (ADC) | flash ADC | voltage-to-time conversion (VTC) | offset calibration | SAR ADC | interpolation ADC | time-domain interpolation (TDI) | cascaded phase interpolation (PI) | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 10/2016, Volume 51, Issue 10, pp. 2222 - 2231
A 12-bit 104 MS/s successive approximation register analog-to-digital converter (SAR ADC) is developed for a digitally-assisted wireless transmitter system for... 
wireless baseband I/Q ADCs | Capacitors | Redundancy | Switches | SAR ADC | Generators | digital calibration SAR ADC | Calibration | non-binary search SAR ADC | Successive approximation register analog-to-digital converter | Wireless communication | Transmitters | reference generator | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Transactions on Circuits and Systems II: Express Briefs, ISSN 1549-7747, 1/2019, pp. 1 - 1
Split-ADC digital background calibration with full-input-range error detection schemes is proposed to rapidly correct the gain and nonlinearity errors in the... 
Circuits and systems | Error analysis | time-interleaved ADC | Analog-to-digital converter (ADC) | nonlinearity | split-ADC | Calibration | pipelined ADC | Data mining | digital background calibration | Prototypes | Timing | Gain
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 08/2013, Volume 48, Issue 8, pp. 1783 - 1794
This paper presents the architecture of a 10b 170 MS/s two-step binary-search assisted time-interleaved SAR ADC. The front-end stage of this ADC is built with... 
Quantization (signal) | Energy resolution | Noise | Analog-to-digital converter (ADC) | Ash | SAR ADC | two-step ADC | binary-search ADC | Timing | Arrays | time-interleaved | Clocks | Time-interleaved | Two-step ADC | Binary-search ADC
Journal Article
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