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Advanced Materials Research, ISSN 1022-6680, 05/2014, Volume 931-932, pp. 984 - 988
A new mismatch model of temperature and narrow channel dependence on threshold voltage of MOSFETs and the parameter extraction method are proposed. A new model... 
BSIM3 | MOSFETs
Journal Article
Procedia Computer Science, ISSN 1877-0509, 2016, Volume 86, pp. 128 - 131
The effects of channel doping and temperature dependence on the BSIM3 threshold voltage model of NMOSFET form substrate bias dependent methodology is proposed.... 
NMOSFET | BSIM3 | Threshold voltage
Journal Article
Journal of Physics: Conference Series, ISSN 1742-6588, 05/2017, Volume 834, Issue 1
Conference Proceeding
IEEE Transactions on Electron Devices, ISSN 0018-9383, 11/2000, Volume 47, Issue 11, pp. 2146 - 2152
Journal Article
IETE Journal of Research, ISSN 0377-2063, 05/2012, Volume 58, Issue 3, pp. 237 - 242
Many applications affecting our daily life require devices that can reach very high voltages. These applications are generally controlled by a logic shifted up... 
Level shifter | Modeling | BSIM3 | HV MOS | TELECOMMUNICATIONS | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, ISSN 1598-1657, 2014, Volume 14, Issue 6, pp. 768 - 776
Journal Article
Proceedings of SPIE - The International Society for Optical Engineering, ISSN 0277-786X, 2012, Volume 8549
Conference Proceeding
IEEE Transactions on Electron Devices, ISSN 0018-9383, 10/2010, Volume 57, Issue 10, pp. 2363 - 2380
The physics, technology, and modeling of complementary asymmetric MOSFETs are reviewed and illustrated with statistically representative silicon data from a... 
cutoff frequency | MOSFET | vertical diffused MOS (VDMOS) | STI | compact modeling | subcircuit | halo | switching speed | dual gate oxide (DGO) | reflection coefficient | hot-carrier | single-pocket | Transconductance | extended-drain MOS (XD-MOS) | trench | T-gate | gate-induced drain leakage | high-voltage | graded-channel | laterally diffused MOS (LDMOS) | doping-gradient-induced barrier lowering (DGIBL) | drift-diffusion | large-scale-integration (LSI) | Analog | Logic gates | mixed-signal | asymmetric | antipunch-through | Medici | doping profile | gate-induced source leakage (GISL) | reliability | scattering theory | voltage gain | variability | Integrated circuit reliability | MOSFETs | matching | CMOS | empty-well | extended-drain | BSIM3 | Implants | noise | drain-extended MOS | drain-induced barrier lowering (DIBL) | retrograde well | TSuprem-4 | deep and lightly doped drain extension (DLDD) | output resistance | threshold adjust | system-on-a-chip | Threshold voltage | transconductance | PHYSICS, APPLIED | HIGH-PERFORMANCE | SILICON | ENGINEERING, ELECTRICAL & ELECTRONIC | AVALANCHE INJECTION | DESIGN | CHANNEL MOSFET | TRANSISTORS | GATE-CONTROLLED DEVICES | ANALOG PERFORMANCE | Metal oxide semiconductor field effect transistors | Measurement | Usage | Analysis | Voltage | Tunneling (Physics) | Silicon | Design and construction | Simulation methods | Electric properties | Integrated circuits | Power supply | Electric potential | Halos | Asymmetry | Circuit design | Semiconductor devices | Devices | Transistors
Journal Article
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, ISSN 1598-1657, 2013, Volume 13, Issue 3, pp. 213 - 223
Journal Article
Solid State Electronics, ISSN 0038-1101, 2001, Volume 45, Issue 2, pp. 351 - 357
1/ f noise has been investigated on the drain to source voltage of deep sub-micron p-channel MOSFETs, with 5 μm channel width and 0.32–1.2 μm varying lengths.... 
Submicron MOSFETs | Noise modeling | 1/ f noise | BSIM3
Journal Article
Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, ISSN 0021-4922, 04/2005, Volume 44, Issue 4 B, pp. 2424 - 2427
We applied a BSIM3-like compact model in order to analyze size dependent low field mobility in MOSFETs. By using the newly proposed extraction method, we have... 
MOSFET | Parasitic resistance | Low field mobility | Halo implant | Mechanical stress | BSIM3 | SHIFT | parasitic resistance | TRANSISTORS | PHYSICS, APPLIED | RATIO METHOD | MOSFET CHANNEL-LENGTH | halo implant | mechanical stress | low field mobility
Journal Article
Journal of the Society for Information Display, ISSN 1071-0922, 11/2008, Volume 16, Issue 11, pp. 1147 - 1155
— A novel approach of modeling a‐Si:H TFTs with the industry‐standard BSIM3 compact model is presented. The described approach defines the a‐Si:H TFT drain... 
Amorphous‐silicon thin‐film transistors | circuit simulation | device modeling | AMLCD | kickback voltage | BSIM3 | Amorphous-silicon thin-film transistors | Circuit simulation | Device modeling | Kickback voltage | PHYSICS, APPLIED | SI-H TFTS | MATERIALS SCIENCE, MULTIDISCIPLINARY | OPTICS | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, 08/2006, Volume 48, Issue 2, pp. 95 - 106
This paper presents the author's integrated approach to custom device mismatch simulations, and is intended for both the design and the modeling communities.... 
Scripts | Capacitors | CAD | Custom | Spice Simulator | MOSFETs | Spectre | Matching | Bipolar | Mismatch Models | Monte Carlo | Library | Transistors | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | spectre | transistors | custom | mismatch models | spice simulator | matching | ENGINEERING, ELECTRICAL & ELECTRONIC | MOS | capacitors | library | BSIM3 MODEL | bipolar | scripts
Journal Article
Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors, ISSN 0253-4177, 06/2006, Volume 27, Issue 6, pp. 1073 - 1077
Journal Article
IEICE transactions on electronics, ISSN 0916-8524, 05/2005, Volume 88, Issue 5, pp. 838 - 844
The new design with minimum loop inductance suitable for the measurements at high frequencies with substrate bias is described. These test structures allow... 
Radio frequency | Compact model | BSIM3 | Bulk effect | MOSFETs | radio frequency | compact model | bulk effect | BSIM3V3 | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, ISSN 1529-2517, 2006, Volume 2006, pp. 373 - 376
Conference Proceeding
2018 IEEE International Power Electronics and Application Conference and Exposition (PEAC), 11/2018, pp. 1 - 6
This work presents the development of a general model translation approach, which aims at modeling and simulation of power MOSFET devices. We use a sub-circuit... 
Semiconductor device modeling | MOSFET | Solid modeling | Computational modeling | parameter extraction | BSIM3 | power MOSFET | compact modeling | Integrated circuit modeling | Standards | Immune system
Conference Proceeding
IEICE transactions on electronics, ISSN 0916-8524, 05/2002, Volume 85, Issue 5, pp. 1182 - 1190
This paper describes the nonlinear behavior of CMOS ADC input capacitance. Our SPICE simulation, based on the BSIM3v3 model, shows that the input capacitance... 
ADC | CMOS | Nonlinearity | Input capacitance | BSIM3 | nonlinearity | input capacitance | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, 11/2005, Volume 45, Issue 2, pp. 123 - 130
Journal Article
Microelectronics Journal, ISSN 0026-2692, 01/2013, Volume 44, Issue 1, pp. 39 - 44
It is well known that junction field effect transistor (JFET) has excellent behaviors in terms of low frequency noise (flicker noise). For this reason, it is... 
JFET | SOI | Modeling | BSIM3 | FET | NANOSCIENCE & NANOTECHNOLOGY | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
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