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IEEE Transactions on Computers, ISSN 0018-9340, 04/2015, Volume 64, Issue 4, pp. 1215 - 1216
The digit-serial systolic double basis multiplier architecture proposed in the above paper does not generate the correct multiplication results as it requires more latches to process digits of inputs... 
Latches | Computer architecture | Logic gates | Polynomials | Complexity theory | Clocks | Propagation delay | Finite field | systolic | digit-serial | multiplier | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | ENGINEERING, ELECTRICAL & ELECTRONIC | Usage | Matrices | Research | Chaos theory | Analysis
Journal Article
IEEE transactions on very large scale integration (VLSI) systems, ISSN 1557-9999, 2005, Volume 13, Issue 4, pp. 476 - 483
.../) using the standard basis representation. From the least significant bit first multiplication algorithm, we obtain a new dependence graph and design an efficient digit-serial systolic multiplier... 
Energy consumption | Delay effects | VLSI | Digit-serial architecture | Galois fields | Pipeline processing | Computer architecture | finite field multiplication | systolic array | Polynomials | Hardware | Cryptography | Clocks | Arithmetic | Systolic array | Finite field multiplication | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | digit-serial architecture | ARCHITECTURES | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Journal of Circuits, Systems and Computers, ISSN 0218-1266, 2014, Volume 23, Issue 7
Journal Article
IEEE transactions on very large scale integration (VLSI) systems, ISSN 1557-9999, 2015, Volume 23, Issue 10, pp. 2322 - 2326
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 07/2017, Volume 64, Issue 7, pp. 1815 - 1825
Journal Article
Computers and Electrical Engineering, ISSN 0045-7906, 08/2015, Volume 46, pp. 29 - 45
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 11/2016, Volume 63, Issue 11, pp. 1944 - 1953
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 03/2015, Volume 62, Issue 3, pp. 881 - 890
Recently, finite field multipliers having high-throughput rate and low-latency have gained great attention in emerging cryptographic systems, but such multipliers over GF(2 m... 
digit-serial | Throughput | Registers | Complexity theory | NIST pentanomials | systolic | low-latency | finite field | high-throughput | Logic gates | NIST | Arrays | Bit-parallel | Propagation delay | FINITE-FIELD | ENGINEERING, ELECTRICAL & ELECTRONIC | Finite fields | Integrated circuits | Usage | Design and construction | Gates (Electronics) | Semiconductor chips
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 11/2014, Volume 61, Issue 11, pp. 3125 - 3134
Journal Article
IET Circuits, Devices & Systems, ISSN 1751-858X, 10/2019, Volume 13, Issue 7, pp. 942 - 949
Journal Article
IEEE Transactions on Computers, ISSN 0018-9340, 2014, Volume 63, Issue 5, pp. 1169 - 1181
Recently in cryptography and security, the multipliers with subquadratic space complexity for trinomials and some specific pentanomials have been proposed... 
digit-serial systolic multiplier | double basis | Subquadratic Toeplitz matrix-vector product | elliptic curve cryptography | MONTGOMERY MULTIPLIERS | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | FINITE-FIELD | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Journal of the Chinese Institute of Engineers, ISSN 0253-3839, 10/2019, Volume 42, Issue 7, pp. 602 - 612
.... A new approach to a polynomial digit-serial multiplier that uses an optimal digit size (d... 
Digit-serial multiplier | Karatsuba algorithm | finite-field | PARALLEL SYSTOLIC MULTIPLIERS | ENGINEERING, MULTIDISCIPLINARY | 2(M) | IMPLEMENTATION
Journal Article
IEEE transactions on circuits and systems. I, Regular papers, ISSN 1558-0806, 2016, Volume 63, Issue 8, pp. 1316 - 1319
In the literature, the generalized (a, b)-way Karatsuba algorithm (KA) is a well-known high-precision technique for implementing a subquadratic digit-serial... 
Digit-serial multiplication | subquadratic space-complexity | b)-way KA | Elliptic curve cryptography | Computational complexity | Galois fields | Multiplying circuits | (a,b)-way KA | (a, b)-way KA | ENGINEERING, ELECTRICAL & ELECTRONIC | Paper | Multiplication | Multipliers | Algorithms | Circuits | Complexity
Journal Article
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