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Journal Article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, ISSN 0018-9200, 10/2017, Volume 52, Issue 10, pp. 2589 - 2600
Reducing the operating voltage of digital systems improves energy efficiency, and the minimum operating voltage of a system (V-min) is commonly limited by SRAM... 
reprogrammable redundancy (RR) | Bit bypass (BB) | line disable (LD) | DIE L3 CACHE | V-min | dynamic column redundancy (DCR) | error-correcting codes (ECC) | redundancy | SRAM | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
2018 IEEE 7th Global Conference on Consumer Electronics (GCCE), 10/2018, pp. 849 - 850
SHA-2 (Secure Hash Algorithm 2) is a set of cryptographic hash functions designed by the United States National Security Agency (NSA). It has a one way... 
SHA-2 | Instruction sets | Linux | Graphics processing units | Blockchain | Parallel processing | Central Processing Unit | Cryptocurrency | L3 cache | Thread level Parallelism
Conference Proceeding
2018 International Conference on Electronics, Information, and Communication (ICEIC), 01/2018, Volume 2018-, pp. 1 - 4
The performance and power of the memory system cannot gradually follow the improving speed and power of the computational cores. To improve the memory... 
Runtime | Instruction sets | Random access memory | FinFET | Predictive models | FinFETs | STT-MRAM | L3 cache | Arrays | SRAM
Conference Proceeding
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 01/2013, Volume 48, Issue 1, pp. 82 - 90
Journal Article
Journal Article
Journal of Information Processing, ISSN 1882-6652, 2012, Volume 20, Issue 2, pp. 358 - 365
Web services and cloud computing paradigms have opened up many new vistas. The data intensive cloud applications usually require huge amounts of data to input... 
low latency | autonomous L3 cache technology | Autonomous l3 cache technology | Low latency
Journal Article
2015 Fifth International Conference on Instrumentation and Measurement, Computer, Communication and Control (IMCCC), 09/2015, pp. 1390 - 1393
L3 Cache timing attack is recently proposed as a new type of Cache timing attacks. In this paper we implement this new ideal on the DSA and demonstrate that... 
Computers | public-key cryptography | L3 cache attack | DSA | Software algorithms | side channel attacks | Public key cryptography | Timing | Monitoring | Side channel attacks | Public-key cryptography | Recovering | Spying | Algorithms | Conferences | Electronics | Instrumentation | Time measurements | Recovery
Conference Proceeding
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, 09/2015, pp. 621 - 624
Conference Proceeding
Information and Media Technologies, ISSN 1881-0896, 2012, Volume 7, Issue 2, pp. 701 - 708
Web services and cloud computing paradigms have opened up many new vistas. The data intensive cloud applications usually require huge amounts of data to input... 
low latency | autonomous L3 cache technology
Journal Article
2015 IEEE Twelfth International Symposium on Autonomous Decentralized Systems, ISSN 1541-0056, 03/2015, pp. 9 - 16
Low latency is the key requirement for cloud based web services particularly when there are heavy processes like inference from large knowledge-base are... 
Filtering | autonomous decentralized system | Ontologies | HTML | text classification | URL filtering | RESTful web service | Engines | Uniform resource locators | Text categorization | Semantics | L3 cache | cloud computing | Filtration | Knowledge representation | Inference | Texts | Decentralized | Autonomous | Knowledge
Conference Proceeding
Proceedings of the 28th Symposium on integrated circuits and systems design, 08/2015, pp. 1 - 6
This paper presents an improved differential evolution (DE) algorithm for multi-objective optimization in the discrete domain, applied to a cache memory... 
differential evolution | Energy consumption | memory exploration | L3 cache | multi-objective optimization | Program processors | Power demand | Cache memory | Memory management | Space exploration | Optimization | Differential evolution | Multi-objective optimization | Memory exploration
Conference Proceeding
Proceedings of the 19th annual international conference on supercomputing, 06/2005, pp. 12 - 20
With the proliferation of e-businesses, Java™ Middleware and OLTP applications are gaining importance. As the gap between CPU and memory latencies continues to... 
emulator | L3 characterization | application server and OLTP
Conference Proceeding
Journal of Computational Information Systems, ISSN 1553-9105, 01/2005, Volume 1, Issue 1, pp. 87 - 92
Journal Article
2010 6th World Congress on Services, ISSN 2378-3818, 07/2010, pp. 447 - 452
Real time application was required many types of industrial controllers, factory machines since 20-century. It is also utilizing many types of real time... 
Performance evaluation | Availability | block I/O device | Jmeter | IOPS | Security | Indexes | Accuracy | Locality of reference | Web services | Fires | L3 Block cache | WAF | Block I/O device
Conference Proceeding
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