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IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 03/2019, Volume 54, Issue 3, pp. 896 - 906
Bitline (BL) charge-recycling-based static random access memory (SRAM) write assist circuits (BCR-WA) are proposed to reduce the minimum operating voltage... 
Charge recycling | Low-power static random access memory (SRAM) | SRAM write assist circuit | Minimum operating voltage of SRAM | 128 MB SRAM | LOW-POWER SRAM | minimum operating voltage of SRAM | low-power static random access memory (SRAM) | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 04/2016, Volume 35, Issue 4, pp. 549 - 558
Journal Article
IEEE Transactions on Circuits and Systems for Video Technology, ISSN 1051-8215, 02/2011, Volume 21, Issue 2, pp. 101 - 112
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 02/2009, Volume 44, Issue 2, pp. 650 - 658
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 04/2015, Volume 62, Issue 4, pp. 1062 - 1070
Journal Article
IEICE Electronics Express, ISSN 1349-2543, 03/2016, Volume 13, Issue 8
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 06/2016, Volume 51, Issue 6, pp. 1487 - 1498
In sub/near-threshold operation, SRAMs suffer from considerable bitline swing degradation when the data pattern of a column is skewed to `1' or `0'. The worst... 
near-threshold circuit | PVT-aware design | 8T SRAM | sub-threshold circuit | data randomization | SRAM cells | Bitline sensing | Sensors | Circuit stability | Leakage currents | Transistors | Thermal stability | VOLTAGE | DESIGN | PROCESSOR | 8T-SRAM | ENGINEERING, ELECTRICAL & ELECTRONIC | READ | SCHEME | AMPLIFIER | SUBTHRESHOLD SRAM | ENHANCEMENT | CELL | Static random access memory | CMOS | Rest | Randomization | Circuits | Swing | Silicon | Arrays
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 03/2019, Volume 66, Issue 3, pp. 978 - 988
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 11/2015, Volume 23, Issue 11, pp. 2438 - 2446
Journal Article
IEEE Transactions on Emerging Topics in Computing, ISSN 2168-6750, 07/2019, Volume 7, Issue 3, pp. 447 - 455
As minimum area SRAM bit-cells are obtained when using cell ratio and pull-up ratio of 1, we analyze the possibility of decreasing the cell ratio from the... 
6T-SRAM | Layout | Circuit reliability | SRAM cells | Stability analysis | Inverters | CMOS embedded SRAM | Circuit stability | Transistors | Vt variability | SRAM | DESIGN | ARRAY | COMPUTER SCIENCE, INFORMATION SYSTEMS | OPPORTUNITIES | TELECOMMUNICATIONS | LOGIC | READ | TECHNOLOGY | MB SRAM | CMOS | Reduction | Semiconductor devices | Energy dissipation | Soft errors | Leakage current
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 10/2007, Volume 42, Issue 10, pp. 2303 - 2313
Journal Article
Proceedings of the IEEE, ISSN 0018-9219, 08/2014, Volume 102, Issue 8, pp. 1126 - 1141
This paper describes the use of physical unclonable functions (PUFs) in low-cost authentication and key generation applications. First, it motivates the use of... 
Ring oscillators | pattern matching | public model PUFs | Random access memory | Tutorials | unclonable | index-based coding | Indexes | SRAM | Oscillators | physical unclonable function (PUF) | SRAM chips | Coding | Logic gates | Hardware | Arbiter | Cryptography | ring oscillator | AUTHENTICATION | SECURE | ENGINEERING, ELECTRICAL & ELECTRONIC | Matching | Errors | Authentication | Paper | Mathematical models | Error correction
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 08/2017, Volume 64, Issue 8, pp. 2036 - 2048
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 08/2016, Volume 24, Issue 8, pp. 2634 - 2642
Journal Article
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), ISSN 0302-9743, 2014, Volume 8731, pp. 510 - 526
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 03/2017, Volume 25, Issue 3, pp. 1183 - 1187
This brief proposes a novel power-gated 9T (PG9T) static random access memory (SRAM) cell that uses a read-decoupled access buffer and power-gating transistors... 
power gating | low-energy operation | static random access memory (SRAM) | Microprocessors | Metals | Computer architecture | FinFET | SRAM cells | FinFETs | Bit interleaving | SCHEME | DESIGN | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | SUBTHRESHOLD SRAM | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
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