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Applied Intelligence, ISSN 0924-669X, 04/2010, Volume 32, Issue 2, pp. 193 - 204
The paper describes an approach for the generation of a deterministic test pattern generator logic, which is composed of D-type and T-type flip-flops. This... 
Design | Genetic algorithm | Optimization | Test pattern generator | Genetic research | Algorithms | Mathematical optimization | Analysis | Searching | Evolution | Test pattern generators | Acceptability | Counting | Flip-flops | Genetic algorithms
Journal Article
European Journal of Operational Research, ISSN 0377-2217, 05/2013, Volume 227, Issue 1, pp. 122 - 132
► An efficient stock market should resemble a random number generator (RNG). ► Therefore, RNG tests can also test the efficient market hypothesis (EMH). ► One,... 
Stock market time series | Financial data mining | Forecasting | Overlapping serial test | Finance | COMPONENTS | RUNS | OPERATIONS RESEARCH & MANAGEMENT SCIENCE | MEMORY | HYPOTHESIS | VARIANCE | EFFICIENCY | VOLATILITY | Data mining | Stock markets | Analysis
Journal Article
International Journal of Pure and Applied Mathematics, ISSN 1311-8080, 2018, Volume 119, Issue 15, pp. 555 - 563
Journal Article
Design Automation for Embedded Systems, ISSN 0929-5585, 12/2017, Volume 21, Issue 3, pp. 247 - 263
Journal Article
SAE technical paper series, Volume 841541.
The procedures and unique hardware used to conduct an experimental investigation into the response of a small turboshaft engine compression system to various... 
Rotary-wing aircraft | Tests and Testing
eJournal
Journal Article
Cluster Computing, ISSN 1386-7857, 11/2019, Volume 22, Issue S6, pp. 15231 - 15244
Lessening power consumption during the test and reducing test time are the main goals of this paper. The power consumption is a major problem of movable... 
Processor Architectures | CMOS | Computer Science | Built in self test (BIST) | Low power logic | Scan chain | Transmission gates | Design for testability (DFT) | Computer Communication Networks | Operating Systems | COMPUTER SCIENCE, INFORMATION SYSTEMS | COMPUTER SCIENCE, THEORY & METHODS
Journal Article
Journal of Electronic Testing, ISSN 0923-8174, 10/2016, Volume 32, Issue 5, pp. 625 - 638
Journal Article
Microprocessors and Microsystems, ISSN 0141-9331, 09/2018, Volume 61, pp. 43 - 57
Aliasing in test response compaction is an important source of fault coverage loss. Methods to avoid the aliasing mostly require modification of the compactor... 
Response compaction | ATPG | Aliasing | SAT | LFSR | Stuck-at fault | Zero-aliasing | MISR | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | SIGNATURE | TEST RESPONSE COMPACTION | ENGINEERING, ELECTRICAL & ELECTRONIC | CIRCUITS | BIST | COMPUTER SCIENCE, THEORY & METHODS
Journal Article
International Journal of Computer Applications, ISSN 0975-8887, 01/2014, Volume 98, Issue 8
  Automatic Test Pattern Generation Automatic Test Pattern Generator is an electronic de-sign automation method used to find an input sequence that, when... 
Design engineering | Automatic test equipment | Automation | Algorithms | Circuits | Electronics | Test pattern generators | Pattern generation
Journal Article
2015 IEEE 24th Asian Test Symposium (ATS), ISSN 1081-7735, 11/2015, Volume 2016-, pp. 43 - 48
Parallelism is one promising solution to accelerating the test pattern generation (TPG) process, several recent works also show that parallel TPG can reduce... 
multi-threading | Instruction sets | Simulation | test inflation | Compaction | determinism | Synchronization | Circuit faults | Test pattern generators | parallel ATPG | dynamic compaction | ATS | Inflation | Dynamics | Strategy | Serials | Time measurements | Counting
Conference Proceeding
International Journal of Electrical and Computer Engineering, ISSN 2088-8708, 08/2018, Volume 8, Issue 4, pp. 2063 - 2071
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 12/2019, pp. 1 - 1
As the number of transistors in the fabricated circuits becomes extremely larger, not only single stuck-at faults, but also multiple stuck-at faults are likely... 
Analytical models | Redundancy | incremental test pattern generation | SAT | multiple stuck-at faults | Automatic Test Pattern Generation | Electronic mail | Circuit faults | Test pattern generators | Integrated circuit modeling
Journal Article
WIT Transactions on Information and Communication Technologies, ISSN 1743-3517, 2014, Volume 48, pp. 1087 - 1094
Conference Proceeding