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IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 02/2012, Volume 20, Issue 2, pp. 319 - 332
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 03/2017, Volume 52, Issue 3, pp. 634 - 644
This paper presents a novel resonating inductor-based supply boosting scheme for low-voltage static random-access memories and logic in deep 14-nm silicon on... 
Couplings | Power supplies | V min">low V min | Random access memory | Integrated circuit interconnections | FinFet | Boosting | FinFETs | Boosted supply | Inductors | low-power electronics | static random-access memory (SRAM) | inductors | low V | low V-min | CELL | ENGINEERING, ELECTRICAL & ELECTRONIC | SOI (semiconductors) | Static random access memory
Journal Article
Chemical Engineering & Processing: Process Intensification, ISSN 0255-2701, 09/2015, Volume 95, pp. 302 - 316
•DWCs for biobutanol recovery from a thermochemical biobutanol process are assessed.•A design technique using shortcut methods and derivative-free optimization... 
Dividing wall column | Total annualized cost | Vmin diagram | Particle swarm optimization | Biobutanol | Acyclic simulation structure | V min diagram | V-min diagram | SIMULATORS | ENERGY & FUELS | KAIBEL | MULTICOMPONENT DISTILLATION | VAPOR-LIQUID-EQUILIBRIA | ENGINEERING, CHEMICAL | MINIMUM ENERGY-CONSUMPTION | DEHYDRATION | OPTIMIZATION | SEPARATION | TECHNOLOGY
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 08/2009, Volume 17, Issue 8, pp. 1127 - 1137
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 10/2017, Volume 52, Issue 10, pp. 2589 - 2600
Reducing the operating voltage of digital systems improves energy efficiency, and the minimum operating voltage of a system (V min ) is commonly limited by... 
reprogrammable redundancy (RR) | Bit bypass (BB) | V min">V min | Redundancy | line disable (LD) | Random access memory | Circuit faults | SRAM | Low voltage | Microprocessors | Computer architecture | Error correction codes | dynamic column redundancy (DCR) | error-correcting codes (ECC) | Reduction | Digital systems | Power management | Energy management
Journal Article
Chemical Engineering Research and Design, ISSN 0263-8762, 09/2017, Volume 125, pp. 433 - 448
[Display omitted] •Flowchart was proposed to simplify the structure of four-product dividing wall column.•Configurations with less vapor and liquid splits were... 
Distillation | Four-product dividing wall column | Vapor and liquid split | Vmin-diagram | diagram | ENGINEERING, CHEMICAL | NUMBER | OPERATION | THERMAL COUPLING LINKS | ONLY TRANSFER STREAMS | V-min-diagram
Journal Article
Journal Article
Chinese Journal of Chemical Engineering, ISSN 1004-9541, 09/2016, Volume 24, Issue 9, pp. 1201 - 1212
The current study presents an effective method of determining and optimizing distillated methanol alternative arrangements. To complement the information... 
Vmin diagram | Heat integration | Energy saving | Methanol distillation | Optimization | diagram | V | V-min diagram | ENGINEERING, CHEMICAL | MINIMUM ENERGY-CONSUMPTION | MULTICOMPONENT DISTILLATION | PETLYUK ARRANGEMENTS
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 01/2013, Volume 48, Issue 1, pp. 118 - 127
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 04/2007, Volume 42, Issue 4, pp. 813 - 819
Journal Article
2015 IEEE Custom Integrated Circuits Conference (CICC), ISSN 0886-5930, 09/2015, Volume 2015-, pp. 1 - 4
With device scaling in bulk technologies, process variation increases and SRAM V MIN scaling faces a bottleneck. Using peripheral assist techniques, we can... 
Decision support systems | Canary SRAM | SRAM dynamic write V MIN tracking | US Department of Defense | Yttrium | wordline and bitline type reverse assist | SRAM dynamic write V | tracking
Conference Proceeding
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 04/2009, Volume 44, Issue 4, pp. 1199 - 1208
This paper addresses the stability problem of diffusion-notch-free (DNF) SRAM cells used in dense last level caches (LLC). A DNF cell eliminates lithographic... 
Temperature | Fluctuations | Circuit simulation | Random access memory | SRAM | variation | MOS devices | Low voltage | Moore's Law | {\rm V}_{\rm MIN} | Cost function | supply noise | Circuit stability | Circuit noise | stability | READ | V-MIN | TECHNOLOGY | ENGINEERING, ELECTRICAL & ELECTRONIC | Static random access memory | Stability | Circuits | Dynamics | Notches | Devices | Diffusion
Journal Article
2010 IEEE International Reliability Physics Symposium, ISSN 1541-7026, 05/2010, pp. 655 - 664
Static Random Access Memories (SRAMs) are present nowadays in all CMOS products in large quantities. Besides, they are often very challenging both on process... 
Design automation | PBTI | V MIN | Circuit simulation | Random access memory | SRAM | NBTI | Research and development | Stress | HCI | Degradation | Design | SRAM chips | Niobium compounds | Libraries | Library | Titanium compounds
Conference Proceeding
Proceedings of the 2013 International Symposium on low power electronics and design, ISSN 1533-4678, 09/2013, pp. 181 - 186
The minimum supply voltage (V min ) is explored for sequential logic circuits by statistically simulating the impact of within-die process variations and... 
hold time | logic V min | gate-dielectric soft breakdown | within-die variation | sequential circuit | data retention | Electric breakdown | Inverters | Logic V min | Logic gates | Delays | Sequential circuits | Transistors | Clocks | Logic V
Conference Proceeding
IEEE JOURNAL OF SOLID-STATE CIRCUITS, ISSN 0018-9200, 10/2017, Volume 52, Issue 10, pp. 2589 - 2600
Reducing the operating voltage of digital systems improves energy efficiency, and the minimum operating voltage of a system (V-min) is commonly limited by SRAM... 
reprogrammable redundancy (RR) | Bit bypass (BB) | line disable (LD) | DIE L3 CACHE | V-min | dynamic column redundancy (DCR) | error-correcting codes (ECC) | redundancy | SRAM | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
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