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2005, 1, The Morgan Kaufmann series in systems on silicon, ISBN 012385251X, xx, 581
.... Designing a multiprocessor system-on-chip (MPSOC) requires an understanding of the various design styles and techniques used in the multiprocessor... 
Systems on a chip | Computer Hardware & Operating Systems | Multiprocessors | Design and construction | Semiconductor Technology
Book
IEEE transactions on computers, ISSN 1557-9956, 2008, Volume 57, Issue 9, pp. 1246 - 1260
Journal Article
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 08/2008, Volume 27, Issue 8, pp. 1479 - 1492
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 09/2008, Volume 16, Issue 9, pp. 1127 - 1140
Journal Article
ACM Journal on Emerging Technologies in Computing Systems (JETC), ISSN 1550-4832, 05/2014, Volume 10, Issue 4, pp. 1 - 25
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Concurrency and Computation: Practice and Experience, ISSN 1532-0626, 03/2017, Volume 29, Issue 6, pp. e3950 - n/a
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 04/2013, Volume 32, Issue 4, pp. 584 - 596
Journal Article
IEEE Transactions on Parallel and Distributed Systems, ISSN 1045-9219, 02/2005, Volume 16, Issue 2, pp. 113 - 129
The growing complexity of customizable single-chip multiprocessors is requiring communication resources that can only be provided by a highly-scalable communication infrastructure... 
Productivity | synthesis | networks on chip | mapping | Design methodology | Systems-on-chip | Multiprocessing systems | Design optimization | Network topology | Network-on-a-chip | Network synthesis | Energy efficiency | Libraries | System-on-a-chip | architecture | Mapping | Networks on chip | Synthesis | Architecture | systems-on-chip | COMPUTER SCIENCE, THEORY & METHODS | ENGINEERING, ELECTRICAL & ELECTRONIC | Systems design | Space exploration
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 03/2008, Volume 27, Issue 3, pp. 542 - 555
Journal Article
Journal of Circuits, Systems and Computers, ISSN 0218-1266, 2018, Volume 28, Issue 7
This paper investigates the techniques to construct high-quality target processor array (faultfree logical subarray) from a physical array with faulty... 
topology reconfiguration | multiprocessor array | fault tolerance | Network on chip | SCHEME | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | PROCESSOR ARRAYS | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Transactions of the Institute of Measurement and Control, ISSN 0142-3312, 6/2018, Volume 40, Issue 10, pp. 3095 - 3104
In chip multiprocessor scheduling, cache memory awareness is critical. However, most existing cache-aware multiprocessor scheduling methods are static and open-loop and thus do not work well in dynamic environments... 
adaptive control | chip multiprocessor | feedback scheduling | Scheduling | modelling | INSTRUMENTS & INSTRUMENTATION | MANAGEMENT | AUTOMATION & CONTROL SYSTEMS
Journal Article