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The Journal of Engineering, ISSN 2051-3305, 4/2014, Volume 2014, Issue 4, pp. 140 - 154
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 09/2018, Volume 26, Issue 9, pp. 1777 - 1787
Journal Article
FRONTIERS IN HUMAN NEUROSCIENCE, ISSN 1662-5161, 07/2019, Volume 13, p. 247
Journal Article
IEEE Transactions on Nuclear Science, ISSN 0018-9499, 10/2013, Volume 60, Issue 5, pp. 3550 - 3556
Journal Article
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, ISSN 0916-8508, 2014, Volume E96-A, Issue 3, pp. 777 - 780
This paper proposes a new flash time-to-digital converter (TDC) circuit which exploits unbalanced arbiters to integrate intrinsic delay offsets into the... 
Slope control | Arbiter | Flash TDC | CALIBRATION | arbiter | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | flash TDC | COMPUTER SCIENCE, INFORMATION SYSTEMS | slope control | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Nuclear Science and Techniques, ISSN 1001-8042, 08/2013, Volume 24, Issue 4
In this paper, a high precision vernier delay line (VDL) TDC (Time-to-Digital Convertor) in an actel flash-based Field-Programmable-Gate-Arrays A3PE1500 is... 
Vernier | Time measurement | Double delay lines | Time-to-digital convertor | Compensation | SYSTEM | PROGRAMMABLE-GATE-ARRAYS | NUCLEAR SCIENCE & TECHNOLOGY | RESOLUTION | TO-DIGITAL CONVERTER | PHYSICS, NUCLEAR
Journal Article
2012 IEEE Radio Frequency Integrated Circuits Symposium, ISSN 1529-2517, 06/2012, pp. 527 - 530
This paper proposes a new flash time-to-digital converter (TDC) design, which incorporates deterministic, variable delay into the decision elements. These are... 
Semiconductor device measurement | arbiter | flash TDC | Logic gates | deterministic variable delay | CMOS integrated circuits | Calibration | Transistors | slope control | Delay
Conference Proceeding
Applied Mechanics and Materials, ISSN 1660-9336, 2013, Volume 336-338, Issue Industrial Instrumentation and Control Systems II, pp. 9 - 18
Theoretical analysis and performance of multi-time averaging TDCs are presented in this paper. The TDCs are implemented in an Actel flash-based FPGA A3PE1500... 
Flash-based FPGA | Multi parallel delay chains | Wave-union | Time-to-digital convertor | Multi-time | CMOS | Delay lines | Performance enhancement | Buffers | Time measurements | Delay | Field programmable gate arrays
Conference Proceeding
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 04/2018, Volume 53, Issue 4, pp. 1172 - 1183
Journal Article
IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 03/2018, Volume 53, Issue 3, pp. 839 - 849
Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers, ISSN 1549-8328, 11/2011, Volume 58, Issue 11, pp. 2614 - 2622
Journal Article
2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW), 07/2016, pp. 1 - 6
This paper presents a time-to-digital converter (TDC) architecture with reduced hardware suitable for multichannel timing built-out self-test (BOST)... 
BOST | TDC | SAR TDC | FPGA | Linearity | Vernier TDC | Delays | Reflective binary codes | Calibration | Flash TDC | Field programmable gate arrays | Approximation | Simulation | Architecture | Mathematical analysis | Converters | Architecture (computers) | Hardware | Time measurements
Conference Proceeding
ICIIECS 2015 - 2015 IEEE International Conference on Innovations in Information, Embedded and Communication Systems, 08/2015, pp. 1 - 4
Modern VLSI technology is mainly driven by digital circuits because digital circuits has many advantages over analog circuits. By using very small and simple... 
Time to Digital Converter (TDC) | Vernier delay TDC | All digital phase locked loops (ADPLL) | Vernier delay ring TDC | Flash type TDC | Communication systems | Architecture | Converters | Delay lines | Digital | Inverters | Delay | Digital circuits
Conference Proceeding
Microelectronics Journal, ISSN 0026-2692, 12/2015, Volume 46, Issue 12, pp. 1343 - 1350
The concept of time-domain reference-ladder for the implementation of fully-digital flash-ADCs is proposed in this work. The complete reference ladder is... 
Flash ADC | Fully-digital | Time-domain | Time-to-digital converter | Pulse-based | CALIBRATION | SEARCH | RESOLUTION | NANOSCIENCE & NANOTECHNOLOGY | ENGINEERING, ELECTRICAL & ELECTRONIC | INTERPOLATION | CMOS | 6-BIT | CONVERTER | Complementary metal oxide semiconductors
Journal Article
Proceedings of SPIE - The International Society for Optical Engineering, ISSN 0277-786X, 2016, Volume 10000
Conference Proceeding
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