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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 05/2013, Volume 32, Issue 5, pp. 774 - 787
Journal Article
2016 IEEE 17th International Symposium on High Assurance Systems Engineering (HASE), ISSN 1530-2059, 01/2016, Volume 2016-, pp. 197 - 204
Transaction-level modeling with SystemC has been very successful in describing the behavior of embedded systems by providing high-level executable models, in... 
Analytical models | Program Verification | Statistical Model Checking | Process control | Model checking | Probabilistic logic | Data models | Probabilistic Assertion | Runtime Verification | Kernel | SystemC | Assurance | Construction | Statistical analysis | Probability theory | Mathematical models | Probabilistic methods | Explosions | Complex systems
Conference Proceeding
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 03/2017, pp. 630 - 633
The necessity to handle the increasing complexity of digital circuits has led to the usage of more and more abstract design paradigms. In particular, the... 
Protocols | Unified modeling language | XML | Data models | Data mining | Time-domain analysis | Time-varying systems
Conference Proceeding
Proceedings of the 49th Annual Design Automation Conference, ISSN 0738-100X, 06/2012, pp. 327 - 333
SystemC is a de-facto standard for modeling system-level designs in the early design stage. Verifying SystemC designs is critical in the design process since... 
symbolic model checking | SystemC | formal verification | Formal Verification | Semantics | Software | Hardware | Reachability analysis | Integrated circuit modeling | Engines | Cost accounting | Symbolic Model Checking
Conference Proceeding
2008 8th International Conference on Application of Concurrency to System Design, ISSN 1550-4808, 06/2008, pp. 56 - 61
SystemC is a system level modeling language with the goal of enabling verification at higher levels of abstraction. In this paper, we propose a mapping from... 
Object oriented modeling | Scalability | Logic design | Mathematics | Engines | Physics | Computer science | Actor Model | Model Checking | System Level Formal Verification | Mathematical model | Kernel | Rebeca | Formal verification | SystemC Verification | Model checking | System level formal verification | SystemC verification | Actor model
Conference Proceeding
ACM Transactions on Design Automation of Electronic Systems (TODAES), ISSN 1084-4309, 05/2010, Volume 15, Issue 3, pp. 1 - 32
SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems at different levels of abstraction. The SystemC... 
formal analysis | model checking | partial-order reduction | simulation | SystemC | Partial-order reduction | Model checking | Formal analysis | Simulation | COMPUTER SCIENCE, SOFTWARE ENGINEERING | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | Algorithms | Verification
Journal Article
Embedded Systems Week 2008 - Proceedings of the 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, 2008, pp. 131 - 136
Conference Proceeding
Journal of Software: Evolution and Process, ISSN 2047-7473, 03/2018, Volume 30, Issue 3, pp. e1890 - n/a
Transaction‐level modeling with SystemC has been very successful in describing the behavior of embedded systems by providing high‐level executable models, in... 
probabilistic temporal assertion | program verification | runtime verification | SystemC models | statistical model checking | COMPUTER SCIENCE, SOFTWARE ENGINEERING | SEMANTICS | Embedded systems | TLM model | Statistical analysis | Computer simulation | Qualitative analysis | Probabilistic models | Temporal logic | Computer Science - Software Engineering
Journal Article
ACM Transactions on Design Automation of Electronic Systems, ISSN 1084-4309, 05/2010, Volume 15, Issue 3
SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems at different levels of abstraction. The SystemC... 
Design engineering | Order reduction | Electronic systems | Race | Switches | Mathematical models | Simulators | Compilers
Journal Article
2010 IEEE International High Level Design Validation and Test Workshop (HLDVT), ISSN 1552-6674, 06/2010, pp. 67 - 74
For Electronic System Level (ESL) design SystemC has become the standard language due to its excellent support of Transaction Level Modeling (TLM). But even if... 
Computer science | Algorithm design and analysis | Iterative algorithms | Mathematical model | Formal verification | Context modeling
Conference Proceeding
by Yanyan Gao and Xi Li
2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 07/2013, pp. 64 - 71
SystemC has become a de-facto standard language for SoC and ASIP designs. The verification of implementation with SystemC is the key to guarantee the... 
TLM | Model checking | Educational institutions | Hardware | Time-domain analysis | SMV | Equations | Time-varying systems | Standards | SystemC
Conference Proceeding
Leibniz Transactions on Embedded Systems, 04/2014, Volume 1, Issue 1, pp. 02:1 - 02:18
SystemC/TLM models, which are C++ programs, allow the simulation of embedded software before hardware low-level descriptions are available and are used as... 
Model checking | Transactional modeling | Verification | Simulation | SystemC
Journal Article
Proceedings of the 2008 IEEE/ACM International Conference on computer-aided design, ISSN 1092-3152, 11/2008, pp. 356 - 363
SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems at different levels of abstraction. The SystemC... 
Concurrent computing | Analytical models | Job shop scheduling | Runtime | Processor scheduling | Computational modeling | Interleaved codes | Performance analysis | Yarn | Context modeling
Conference Proceeding
Proceedings of the International Conference on computer-aided design, ISSN 1092-3152, 11/2010, pp. 794 - 799
One of the main purposes to use SystemC in system development is to perform system-level verification in the early design stage. However, simulation is still... 
Analytical models | Computational modeling | System recovery | Data models | Synchronization | Kernel | Engines
Conference Proceeding
ACM Transactions on Embedded Computing Systems (TECS), ISSN 1539-9087, 03/2013, Volume 12, Issue 1s, pp. 1 - 23
SystemC is widely used for modeling and simulation in hardware/software co-design. However, existing verification techniques are mostly ad-hoc and... 
HW/SW co-verification | model checking | test automation | SystemC | Model checking | Test automation | COMPUTER SCIENCE, SOFTWARE ENGINEERING | TIMED AUTOMATA | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | SEMANTICS | Verification | Reliability | Antilock braking systems
Journal Article
2014 21st Asia-Pacific Software Engineering Conference, ISSN 1530-1362, 12/2014, Volume 1, pp. 271 - 278
SystemC is an IEEE standard system-level language and has been widely adopted in development of embedded systems. Verifying SystemC designs is critical since... 
Computer science | Algorithm design and analysis | partial order reduction | Model checking | Software | Explosions | Hardware | Electronic mail | symbolic model checking | SystemC | Symbolic model checking | Partial order reduction | Design engineering | Order reduction | Conferences | Checkers | Program verification (computers) | Standards | Software engineering
Conference Proceeding
Proceedings of the 52nd Annual Design Automation Conference, ISSN 0738-100X, 06/2015, Volume 2015-, pp. 1 - 6
Formal verification of high-level SystemC designs is an important and challenging problem. Recent works have proposed symbolic simulation in combination with... 
Context | Schedules | Object oriented modeling | Computational modeling | Model checking | Concrete | Optimization | Design engineering | Order reduction | Computer simulation | Conferences | Simulation | Preserves | Mathematical models | Handling
Conference Proceeding
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 08/2012, Volume 31, Issue 8, pp. 1249 - 1262
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 2013, Volume 32, Issue 5, pp. 774 - 787
Journal Article
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