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multiplying circuits (181) 181
technology (158) 158
science & technology (156) 156
engineering (144) 144
engineering, electrical & electronic (137) 137
clocks (46) 46
computer science (45) 45
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multiplication (34) 34
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semiconductor electronics. microelectronics. optoelectronics. solid state devices (30) 30
multipliers (29) 29
digital arithmetic (26) 26
jitter (26) 26
electric, optical and optoelectronic circuits (25) 25
multiplying delay-locked loop (25) 25
circuit properties (24) 24
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bandwidth (21) 21
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usage (16) 16
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circuits and systems (14) 14
delay (14) 14
delays (14) 14
design. technologies. operation analysis. testing (14) 14
digital circuits (14) 14
optimization (14) 14
analysis (13) 13
galois fields (13) 13
operational amplifiers (13) 13
power consumption (13) 13
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architecture (12) 12
design and construction (12) 12
hardware (12) 12
multiplying dac (12) 12
multiplying digital-to-analog converter (12) 12
oscillators (12) 12
computer architecture (11) 11
electric potential (11) 11
multiplikationsglied (11) 11
phase-locked loop (11) 11
cmos technology (10) 10
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digital signal processing (10) 10
digital-analog conversion (10) 10
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complementary metal oxide semiconductors (9) 9
complexity (9) 9
complexity theory (9) 9
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quantization (8) 8
reference spur (8) 8
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signal processing (8) 8
studies (8) 8
arithmetic (7) 7
cmos logic circuits (7) 7
converters (7) 7
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1. Full Text Analysis and Design of a 5 GS/s Analog Charge-Domain FFT for an SDR Front-End in 65 nm CMOS
by Sadhu, Bodhisatwa and Sturm, Martin and Sadler, Brian M and Harjani, Ramesh
IEEE journal of solid-state circuits, ISSN 0018-9200, 05/2013, Volume 48, Issue 5, pp. 1199 - 1211
fast Fourier transforms | multiplying circuits | very high speed integrated circuits | modulation | OFDM | Capacitors | RF signals | Dynamic range | switched circuits | transforms | spectral analysis | passive filters | Engines | linear circuits | Radio frequency | Analytical models | FIR filters | cognitive radio | mixed analog digital integrated circuits | multiple signal classification | software radio | FET integrated circuits | Bandwidth | signal sampling | filtering | MOS integrated circuits | summing circuits | channel bank filters | discrete cosine transforms | radio spectrum management | signal analysis | signal detection | integrated circuit noise | Discrete Fourier transforms | demodulation | software defined radio | radio-frequency integrated circuits | phase shifters | switched capacitor | analog integrated circuits | passive circuits | sampled data circuits | signal to noise ratio | Clocks | integrated circuit modeling | Software defined radio | Passive filters | Phase shifters | Transforms | Radio spectrum management | Fast Fourier transforms | Switched circuits | Modulation | Very high speed integrated circuits | Passive circuits | Discrete cosine transforms | Switched capacitor | Signal detection | Filtering | Signal sampling | Multiple signal classification | Cognitive radio | Spectral analysis | Analog integrated circuits | Radio-frequency integrated circuits | Integrated circuit noise | Summing circuits | Linear circuits | Sampled data circuits | Channel bank filters | Integrated circuit modeling | Mixed analog digital integrated circuits | Signal analysis | Multiplying circuits | Demodulation | Signal to noise ratio | Software radio | Exact sciences and technology | Frequency filters | Electronics | Design. Technologies. Operation analysis. Testing | Circuit properties | Electric, optical and optoelectronic circuits | Input-output equipment | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | Integrated circuits | Applied sciences | Hardware | Transistors | Electronic circuits
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2. Full Text Analysis and Design of CMOS Clocking Circuits For Low Phase Noise
by Woorham Bae and Deog-Kyoon Jeong
2020, ISBN 9781785618017, 255
Metal oxide semiconductors, Complementary -- Design and construction
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3. Full Text Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems
: Architectures and circuits for modern wireless and wireline systems
by Woogeun Rhee
2020, Control, Robotics and Sensors, ISBN 1785618857, 736
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4. Full Text Role of circuit representation in evolutionary design of energy-efficient approximate circuits
by Mrazek, Vojtech and Vasicek, Zdenek and Hrbacek, Radek
IET computers & digital techniques, ISSN 1751-8601, 7/2018, Volume 12, Issue 4, pp. 139 - 149
Special Section: Bio-inspired Hardware and Evolvable Systems | evolutionary design method | multiplying circuits | approximation theory | circuit approximation | circuit representation | Pareto dominant solutions | energy‐efficient electronic systems | fitness function | evolutionary algorithms | multiplier design | circuit parameters | energy‐efficient approximate circuits | scalability problems | energy‐efficient multipliers | adders | key arithmetic circuit approximation | energy conservation | comprehensive library | benchmark problem | adder design | logic design | Computer Science, Theory & Methods | Computer Science, Hardware & Architecture | Technology | Computer Science | Science & Technology
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5. Full Text Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits
by Moller, Konrad and Kumm, Martin and Garrido, Mario and Zipf, Peter
IEEE transactions on computer-aided design of integrated circuits and systems, ISSN 0278-0070, 03/2018, Volume 37, Issue 3, pp. 710 - 714
Multiplexing | reconfigurable architectures | Hardware | optimization methods | Kernel | Adders | Optimization | Field programmable gate arrays | Multiplying circuits | Pipeline processing | Engineering | Computer Science, Interdisciplinary Applications | Technology | Computer Science | Engineering, Electrical & Electronic | Computer Science, Hardware & Architecture | Science & Technology
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6. Full Text Power-efficient compensation circuit for fixed-width multipliers
by Kumar, Ganjikunta Ganesh and Sahoo, Subhendu K
IET circuits, devices & systems, ISSN 1751-858X, 7/2020, Volume 14, Issue 4, pp. 505 - 509
Research Article | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology
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7. Full Text Design of long-range, powerless RFID sensor at 10 GHz
by Donelli, M
Electronics letters, ISSN 0013-5194, 9/2013, Volume 49, Issue 20, pp. 1277 - 1278
Microwave technology | multiplying circuits | radiofrequency identification | modulation | reader | Chockcroft‐Walton multiplier circuit | transponder | radio frequency identifier tag sensor | RFID tag sensor | protocols | EM4102 RFID protocol | power supply | frequency 10 GHz | load modulation | antennas | antenna tag | X band | electromagnetic wave scattering | MST | rectifying circuits | transponders | modulated scattering technique | switch circuit | long range powerless RFID sensor | rectifying circuit | interogating electromagnetic field | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits | Radiocommunications | Telecommunications and information theory | Exact sciences and technology | Electronics | Applied sciences | Telecommunications | Circuit properties | Electric, optical and optoelectronic circuits
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8. Full Text Clock Multiplication Techniques Using Digital Multiplying Delay-Locked Loops
by Elshazly, A and Inti, R and Young, B and Hanumolu, P. K
IEEE journal of solid-state circuits, ISSN 0018-9200, 06/2013, Volume 48, Issue 6, pp. 1416 - 1428
Phase noise | Jitter | supply noise sensitively | digitally-controlled oscillator (DCO) | Calibration-free | 1-bit TDC | Bandwidth | deterministic jitter | digital MDLL | multiplying delay-locked loop (MDLL) | ring oscillator | clock multiplier | transfer function | reference spur | DPLL | Phase locked loops | voltage controlled oscillator (VCO) | phase-locked loop (PLL) | time-to-digital converter (TDC) | power supply noise | power efficient | delta-sigma DAC | digital loop filter | digital PLL | TDC-oscillator tradeoff | Clocks | jitter | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Integrated circuits | Oscillators, resonators, synthetizers | Exact sciences and technology | Signal convertors | Electronics | Applied sciences | Circuits of signal characteristics conditioning (including delay circuits) | Design. Technologies. Operation analysis. Testing | Circuit properties | Electric, optical and optoelectronic circuits | Electronic circuits | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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9. Full Text Switching architecture for CMOS exponential function generators eliminating squarer/multiplier circuits
by Ray, S and Hella, M.M
Electronics letters, ISSN 0013-5194, 2/2014, Volume 50, Issue 4, pp. 258 - 260
Circuits and systems | MOSFET | multiplying circuits | function generators | CMOS exponential function generators | second‐order rational approximation | voltage 1.2 V | squarer/multiplier circuits | size 0.13 mum | power 0.45 mW | switching circuits | switching architecture | MOS transistors | saturation regime | CMOS integrated circuits | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Integrated circuits | Electronics | Applied sciences | Integrated circuits by function (including memories and processors) | Exact sciences and technology | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | CMOS | Noise levels | Multipliers | Architecture | Circuits | Exponential functions | Generators | Switching
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10. Full Text Continuous-flow variable-length memoryless linear regression architecture
by Garrido, M and Grajal, J
Electronics letters, ISSN 0013-5194, 11/2013, Volume 49, Issue 24, pp. 1567 - 1569
Signal processing | multiplying circuits | adders | continuous‐flow variable‐length memoryless linear regression architecture | regression analysis | pipelined circuit | multipliers | dividing circuits | dividers | logic design | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Integrated circuits | Electronics | Applied sciences | Integrated circuits by function (including memories and processors) | Exact sciences and technology | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | Circuits
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11. Full Text An Externally-Linear-Internally-Nonlinear RMS-to-DC converter
by Pilsniak, Adam and Kampik, Marian
IEEE transactions on instrumentation and measurement, ISSN 0018-9456, 2/2021, Volume 70, pp. 1 - 1
ELIN filters | multiplying circuits | Voltage measurement | Capacitors | AC voltage | Low-pass filters | Dynamic range | analog processing circuits | root mean square | Prototypes | nonlinear circuits | Mathematical model | Integrated circuit modeling
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12. Full Text Low-cost fixed-width squarer by using probability-compensated circuit
by Chen, Yuan-Ho
Electronics letters, ISSN 0013-5194, 5/2014, Volume 50, Issue 11, pp. 795 - 797
Circuits and systems | multiplying circuits | area‐delay product | digital arithmetic | uniform compensated bias | integrated circuit design | probability | low cost fixed width squarer | probability compensated circuit | logic design | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Integrated circuits | Electronics | Applied sciences | Integrated circuits by function (including memories and processors) | Exact sciences and technology | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | Circuits | Truncation errors | Bias
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13. Full Text Area- and power-efficient DC–DC converter with on-chip compensation
by Liu, Pang-Jung and Chang, Yi-Hsiang
Electronics letters, ISSN 0013-5194, 7/2014, Volume 50, Issue 16, pp. 1157 - 1158
Power electronics, energy conversion and sustainability | power‐efficient DC‐DC converter | multiplying circuits | transient response | area‐efficient DC‐DC converter | compensation resistor | current 450 mA | on‐chip frequency compensation | compensation capacitor | DPCM technique | elemental semiconductors | resistors | capacitors | silicon | DC‐DC power convertors | dual‐path capacitor multiplier technique | circuit stability | compensation | equivalent capacitance | stability | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Electrical engineering. Electrical power engineering | Convertors | Exact sciences and technology | Electronics | Electrical machines | Amplifiers | Circuit properties | Electric, optical and optoelectronic circuits | Integrated circuits by function (including memories and processors) | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | Integrated circuits | Applied sciences | Electronic circuits | Resistors | Equivalence | Capacitors | Compensation | Converters | Silicon | Discharge | Transient responses
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14. Full Text High-speed energy efficient process, voltage and temperature tolerant hybrid multi-threshold 4:2 compressor design in CNFET technology
by Avan, Amin and Maleknejad, Mojtaba and Navi, Keivan
IET circuits, devices & systems, ISSN 1751-858X, 5/2020, Volume 14, Issue 3, pp. 357 - 368
Research Article | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology
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15. Full Text Gate diffusion input based 4-bit Vedic multiplier design
by Garg, Ankit and Joshi, Garima
IET circuits, devices & systems, ISSN 1751-858X, 11/2018, Volume 12, Issue 6, pp. 764 - 770
Research Article | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology
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16. Full Text Programmable fractional-ratio frequency multiplying clock generator
by Han, Sangwoo and Kim, Jintae and Kim, Jongsun
Electronics letters, ISSN 0013-5194, 1/2014, Volume 50, Issue 3, pp. 163 - 165
Circuits and systems | frequency 0.85 GHz to 1.5 GHz | voltage 1.2 V | frequency multipliers | CMOS process | programmable delay‐locked loop | size 0.13 mum | clocks | delay lock loops | integer clock multiplication | programmable fractional‐ratio frequency multiplying clock generator | CMOS integrated circuits | UHF integrated circuits | power 9.0 mW | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology | Oscillators, resonators, synthetizers | Exact sciences and technology | Electronics | Applied sciences | Circuit properties | Electric, optical and optoelectronic circuits | Electronic circuits | Dynamic link libraries | CMOS | Clock generators | Multiplication | Dissipation | Jitter | Frequency ranges | Clocks
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17. Full Text A compact CMOS current-mode analog multi-functions circuit
by Al-Suhaibani, Eyas S and Al-Absi, Munir A
Analog integrated circuits and signal processing, ISSN 0925-1030, 9/2015, Volume 84, Issue 3, pp. 471 - 477
Engineering | Current-mode circuits | Signal, Image and Speech Processing | Subthreshold | Analog circuits | Circuits and Systems | Amplifiers | Multiplying circuits | Electrical Engineering | Amplifiers (Electronics) | Transistors | Complementary metal oxide semiconductors | CMOS | Electric circuits | Direct current | Linearity | Maximum power | MOSFETs
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18. Full Text A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations Into Partial Product Reduction Process
by Tung, Che-Wei and Huang, Shih-Hsu
IEEE access, ISSN 2169-3536, 2020, Volume 8, pp. 87367 - 87377
multiplying circuits | pipeline processing | logic circuits | Digital circuits | power dissipation | Computer Science, Information Systems | Engineering | Technology | Computer Science | Engineering, Electrical & Electronic | Telecommunications | Science & Technology | Multiplication | Reduction | Power consumption | Architecture | Circuits
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19. Full Text Low-power-delay-product radix-4 88 Booth multiplier in CMOS
by Xue, H and Patel, R and Boppana, N.V.V.K and Ren, S
Electronics letters, ISSN 0013-5194, 3/2018, Volume 54, Issue 6, pp. 344 - 346
Circuits and systems | multiplying circuits | binary‐to‐2's complement converter | graphic processing unit | voltage 1.2 V | CPU | size 90.0 nm | power consumption | CMOS logic circuits | low‐power‐delay‐product radix‐4 8 × 8 Booth multiplier | CPU portable applications | 2:1 MUX | microelectronic implementations | CMOS technology | unique optimised stage‐1 architecture | low‐power electronics | battery powered applications | digital multiplier circuit | logic design | digital signal processing | adder‐subtractor | Engineering, Electrical & Electronic | Engineering | Technology | Science & Technology
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20. Full Text Low-precision DSP-based floating-point multiply-add fused for Field Programmable Gate Arrays
by Amaricai, Alexandru and Boncalo, Oana and Gavriliu, Constantina-Elena
IET computers & digital techniques, ISSN 1751-8601, 7/2014, Volume 8, Issue 4, pp. 187 - 197
mantissa data‐path processing | multiplying circuits | low‐precision DSP‐based floating‐point multiply‐add fused | field programmable gate arrays | FP multiply‐add fused units | floating point arithmetic | DSP blocks | multiply‐add stage | multiply‐add fused operation | low‐precision formats | Computer Science, Theory & Methods | Computer Science, Hardware & Architecture | Technology | Computer Science | Science & Technology | Integrated circuits | Exact sciences and technology | Electronics | Applied sciences | Design. Technologies. Operation analysis. Testing | Circuit properties | Electric, optical and optoelectronic circuits | Integrated circuits by function (including memories and processors) | Electronic circuits | Digital circuits | Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices | Multimedia | Construction | Digital techniques | Digital signal processing | Floating point arithmetic | Filled plastics | Cost engineering | Field programmable gate arrays
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