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engineering, electrical & electronic (12) 12
random access memory (9) 9
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IEEE Journal of Solid-State Circuits, ISSN 0018-9200, 04/2008, Volume 43, Issue 4, pp. 956 - 963
An eight-transistor (8T) cell is proposed to improve variability tolerance and low-voltage operation in high-speed SRAM caches. While the cell itself can be... 
static noise margin | Stability | Power supplies | Redundancy | Random access memory | Inverters | Logic design | Pulse modulation | SRAM | variation | write margin | Threshold voltage | Multiport memories | Logic devices | Logic arrays | Variation | Write margin | Static noise margin | SRAM CELL | stability | multiport memories | ENGINEERING, ELECTRICAL & ELECTRONIC | CMOS | Circuits | Dynamics | High speed | Palladium | Tolerances
Journal Article
IEEE Transactions on Circuits and Systems II: Express Briefs, ISSN 1549-7747, 03/2014, Volume 61, Issue 3, pp. 188 - 192
Journal Article
2015 IEEE Custom Integrated Circuits Conference (CICC), ISSN 0886-5930, 09/2015, Volume 2015-, pp. 1 - 4
This paper presents a low-power and low-voltage 64-kb 8T three-port image memory using a 28-nm FD-SOI process technology. Our proposed SRAM accommodates... 
Semiconductor device measurement | Majority Logic | Logic circuits | Logic gates | SRAM cells | FD-SOI | Transistors | Yttrium | Image Memory | 28-nm | Multiport SRAM | Static random access memory | Electric potential | Access time | Conferences | Energy conservation | Voltage | Ports
Conference Proceeding
2014 IEEE International Symposium on Circuits and Systems (ISCAS), ISSN 0271-4302, 06/2014, pp. 2181 - 2184
This paper combines several low-leakage and low-cost techniques to design multi-port static random access memory (SRAM) for register file in a vertex shader... 
register file | body-bias | low-leakage design | power-gating | Layout | Memory management | SRAM cells | multiport SRAM | Generators | Registers | Delays
Conference Proceeding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 10/2001, Volume 9, Issue 5, pp. 590 - 598
Journal Article
IEEE Transactions on Computers, ISSN 0018-9340, 05/2002, Volume 51, Issue 5, pp. 460 - 473
Journal Article
Journal Article
2016 International Siberian Conference on Control and Communications (SIBCON), 05/2016, pp. 1 - 5
Multiport CMOS cell with the soft-error immunity based on DICE which is divided into two spaced groups of transistors each of them consisting of four... 
Random access memory | Ports (Computers) | simulation | topology | multiport memory cell | Inverters | Registers | noise immunity | single nuclear particle | CMOS integrated circuits | Transistors | Clocks | RAM | Static random access memory | Hardening | CMOS | Semiconductor devices | Logic | Nuclear particles | Immunity
Conference Proceeding
2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), 01/2015, pp. 1 - 6
Register Files (RF) are multi-port static memories with dedicated READ and WRITE ports for high bandwidth memory operations. The Register Files are important... 
Radio frequency | custom design | BSIM CMG | Random access memory | FinFET | static noise margin (SNM) | SPICE | multiport SRAM | BSIM IMG | Transistors | Flip-flops | Periodic structures | Distributed memory | Design engineering | Static random access memory | Stability | Semiconductor devices | Ports | Registers | MOSFETs
Conference Proceeding
IEEE Transactions on Computers, ISSN 0018-9340, 08/2011, Volume 60, Issue 8, pp. 1182 - 1193
Journal Article
Electronics and Communications in Japan (Part II: Electronics), ISSN 8756-663X, 05/1999, Volume 82, Issue 5, pp. 1 - 12
This article describes the design of high‐performance SRAMs having two input/output ports. Assuming the same macrocell size, two‐port SRAMs are superior to the... 
low power | two port | high speed | SRAM | WE‐signal | macrocell | (WE)over-bar-signal | MULTIPORT | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
IEICE transactions on fundamentals of electronics, communications and computer sciences, ISSN 0916-8508, 04/2007, Volume 90, Issue 4, pp. 815 - 822
This paper proposes a new efficient method of characterizing a memory compiler in order to reduce the computation time and remove human error. The new features... 
Characterization | LPE | Memory compiler | SoC | COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | MULTIPORT RAM | COMPUTER SCIENCE, INFORMATION SYSTEMS | mentory compiler | characterization | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
2010 International SoC Design Conference, 11/2010, pp. 445 - 448
A general procedure to calculate the stability of the multiport memory cell is proposed. Noise margins of the 4-port and 8-port SRAM cell are studied. A novel... 
noise margin | Microprocessors | Noise | Random access memory | Computer architecture | Capacitance | multiport SRAM | Inverters | Transistors | Noise margin | Multiport SRAM
Conference Proceeding
IEICE Transactions on Information and Systems, ISSN 0916-8532, 2017, Volume E100.D, Issue 10, pp. 2478 - 2492
The high performance network-on-chip (NoC) router using minimal hardware resources to minimize the layout area is very essential for NoC design. In this paper,... 
network-on-chip (NoC) | router | interconnection network | multi-port memory | Interconnection network | Multiport memory | Router | Network-on-chip (NoC) | COMPUTER SCIENCE, SOFTWARE ENGINEERING | multiport memory | ON-CHIP | COMPUTER SCIENCE, INFORMATION SYSTEMS | Performance evaluation | Networks | Toruses | Hardware | System on chip | Communication
Journal Article
IEICE Electronics Express, ISSN 1349-2543, 2005, Volume 2, Issue 19, pp. 488 - 494
Multiport memories are increasingly used in smart-phones, multimode handsets, multiprocessor systems, network processors, graphics chips, and other high... 
multiport memory | arbitration | shared memory | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
Proceedings of the 25th edition on great lakes symposium on vlsi, 05/2015, Volume 20-22-, pp. 139 - 144
With the growing number of cores on chips, conventional electrical interconnects reach scalability limits, leading the way for alternatives like Radio... 
reconfigurable | many-core | dynamic | noc | Dynamic | NoC | Many-Core | Reconfigurable
Conference Proceeding
共用記憶體(Shared 處理機(Multiprocessor)間互通訊息之重要媒介。在 緊接(Tightly)工作環境中,多埠靜態隨機擷取記憶體(Multiport SRAMs) 是很好選擇。 量和可介接大量處理機的多埠SRAM,依目前技術有實際困 難[1]。因... 
循環優先仲裁協定 | 共用記憶體 | Multiport Controller | Token | PRAM | 多埠記憶體控制器 | Scalable Memory Controller
Dissertation
Chinese Journal of Electronics, ISSN 1022-4653, 7/2018, Volume 27, Issue 4, pp. 873 - 878
By using processing variations in the unitcircuits of the same structures and design parameters during manufacturing, Physical unclonable function (PUF)... 
Physical unclonable function (PUF) | Circuit design | Multiport | Zero temperature coefficient (ZTC) | PHYSICAL UNCLONABLE FUNCTIONS | KEY GENERATION | ENGINEERING, ELECTRICAL & ELECTRONIC
Journal Article
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