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test pattern generators (192) 192
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Cluster Computing, ISSN 1386-7857, 11/2019, Volume 22, Issue S6, pp. 15231 - 15244
Lessening power consumption during the test and reducing test time are the main goals of this paper. The power consumption is a major problem of movable... 
Processor Architectures | CMOS | Computer Science | Built in self test (BIST) | Low power logic | Scan chain | Transmission gates | Design for testability (DFT) | Computer Communication Networks | Operating Systems | COMPUTER SCIENCE, INFORMATION SYSTEMS | COMPUTER SCIENCE, THEORY & METHODS
Journal Article
2015 IEEE 24th Asian Test Symposium (ATS), ISSN 1081-7735, 11/2015, Volume 2016-, pp. 43 - 48
Parallelism is one promising solution to accelerating the test pattern generation (TPG) process, several recent works also show that parallel TPG can reduce... 
multi-threading | Instruction sets | Simulation | test inflation | Compaction | determinism | Synchronization | Circuit faults | Test pattern generators | parallel ATPG | dynamic compaction | ATS | Inflation | Dynamics | Strategy | Serials | Time measurements | Counting
Conference Proceeding
International Journal of Pure and Applied Mathematics, ISSN 1311-8080, 2018, Volume 119, Issue 12, pp. 3851 - 3859
Journal Article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ISSN 1063-8210, 04/2013, Volume 21, Issue 4, pp. 614 - 623
Journal Article
Journal of Electronic Testing, ISSN 0923-8174, 8/2010, Volume 26, Issue 4, pp. 443 - 451
Journal Article
Design Automation for Embedded Systems, ISSN 0929-5585, 12/2017, Volume 21, Issue 3, pp. 247 - 263
Journal Article
2017 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC), 12/2017, pp. 1 - 4
Now a days low power consumption is essential for portable computing devices and mobile operated devices. BIST is a technique to make chip self testable and to... 
MISR (Multiple Input Signature Register) | Computer architecture | Built-in self-test | Benchmark testing | BIST (Built-in-self Test) | TPG(Test Pattern Generator) | Circuit faults | Test pattern generators | LFSR (Linear Feedback Shift Register) | Clocks
Conference Proceeding
Journal of Electronic Testing, ISSN 0923-8174, 8/2011, Volume 27, Issue 4, pp. 477 - 484
Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, 08/1998, Volume 17, Issue 8, pp. 692 - 705
Journal Article
JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS, ISSN 1555-130X, 12/2016, Volume 11, Issue 6, pp. 783 - 791
In this paper, a novel Linear Feedback Shift Register (LFSR) with Look Ahead Clock Gating (LACG) technique has been proposed to reduce the power consumption in... 
DESIGN | PHYSICS, APPLIED | Test Pattern Generator | BIST TPG | LOW SWITCHING ACTIVITY | BIST | NANOSCIENCE & NANOTECHNOLOGY | LACG | LFSR | ENGINEERING, ELECTRICAL & ELECTRONIC | Reduction | Linear feedback shift registers | Dynamics | Gating and risering | Test pattern generators | Switching | Flip-flops | Clocks
Journal Article
IEICE Transactions on Electronics, ISSN 0916-8524, 2010, Volume E93-C, Issue 5, pp. 696 - 702
To tackle the increasing testing power during built-in self-test (BIST) operations, this paper proposes a new test pattern generator (TPG). With the proposed... 
Fault coverage | Built-in self-test (BIST) | Single input change (SIC) | Power | LOW SWITCHING ACTIVITY | built-in self-test (BIST) | single input change (SIC) | TPG | power | fault coverage | ENGINEERING, ELECTRICAL & ELECTRONIC | Simulation | Circuits | Mathematical analysis | Electronics | Hardware | Vectors (mathematics) | Test pattern generators | Switching
Journal Article
2015 10th International Design & Test Symposium (IDT), 12/2015, pp. 124 - 128
This paper presents the use of switch-tail ring counter as low transition test pattern generator (TPG) to reduce power consumption in test-per-clock and... 
Power demand | low power test | Radiation detectors | scan-based test | Switches | Built-in self-test | low transition test pattern generator (LT-TPG) | Registers | Test pattern generators | Switch-tail ring counter | weighted switching activity (WSA) | built-in self-test (BIST) | Clocks | Strontium | Power consumption | Circuits | Benchmarking | Switching
Conference Proceeding
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